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3. Assume the following latencies: 1 clock cycle for arithmetic/logic operations, 5 clock cycles for control flow operations, 100 clock cycles for memory operations. Assume

3. Assume the following latencies: 1 clock cycle for arithmetic/logic operations, 5 clock cycles for control flow operations, 100 clock cycles for memory operations. Assume that the data path is unpipelined. a. Assume that array a is sorted in descending order. Compute the CPI of your program (say CPID) and briefly explain your approach.

b. Assume that array a is sorted in ascending order. Compute the CPI of your program (say CPIA).

c. Assume now a memory system enabling each memory instruction to be executed in 25 clock cycles. What is now the CPI (say CPIX) of your program, assuming that array a is sorted in descending order? Show how you compute the CPIX. Explain.

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