3. Processor C is a CISC processor with a 1.8 GHz clock rate. The average simple instruction requires one cycle to complete, assuming zero wait state memory accesses. The average complex instruction requires two cycles to complete, assuming zero wait state memory accesses. Processor R is a 64 bit RISC processor with a 2GHz clockrate. The average instruction requires one cycle to complete, assuming zero wait state memory accesses. Processor R can't directly implement the complex processing instructions of Processor C. Executing an equivalent set of simple instructions requires an average of three cycles to complete, assuming zero wait state memory accesses. Program S contains nothing but simple instructions (assuming there are 100 instructions). Program C executes 70% simple instructions and 30% complex instructions (assuming Program S has 100 instructions). CIT320 Chapter 4 In-Class 3. Processor C is a CISC processor with a 1.8 GHz clock rate. The average simple instruction requires one cycle to complete, assuming zero wait state memory accesses. The average complex instruction requires two cycles to complete, assuming zero wait state memory accesses. Processor R is a 64 bit RISC processor with a 2GHz clockrate. The average instruction requires one cycle to complete, assuming zero wait state memory accesses. Processor Rean't directly implement the complex processing instructions of Processor C. Executing an equivalent set of simple instructions requires an average of three cycles to complete, assuming zero wait state memory accesses. Program S contains nothing but simple instructions (assuming there are 100 instructions). Program C executes 70% simple instructions and 30% complex instructions (assuming Program S has 100 instructions). Which processor will execute program S more quickly? Which processor will execute program C more quickly