4. The table shows the delays (pico second) of the components in Figure 4.17.

Calculate the delay of the 4 types of instructions. You need to show which components are used in each instruction.

Adder Control Read/write l-mem PC D-mem 10250 Register Mux ALU file 150 25 200 And, Sign Shifter extend 10 50 150 50 Instruction Delay add Id sd beq 0 Add 4 ALU Add result 1 Shift left 2 Instruction (31-26] RegDst Branch MemRead MemtoReg Control ALUOp MemWrite ALUST RegWrite PC Instruction [25-21) Read address Instruction (2016) Instruction [31-01 Instruction instruction [15-11) memory Read register 1 Read Read data 1 register 2 Write Read Zero ALU ALU Read Address data result register data 2 Write data Registers Write Data data memory Instruction [15-01 16 32 Sign- extend ALU control Instruction (5-0) FIGURE 4.17 The simple datapath with the control unit. The input to the control unit is the 6-bit opcode field from the instruction. The outputs of the control unit consist of three 1-bit signals that are used to control multiplexors (RegDst, ALUSrc, and Memto Reg), three signals for controlling reads and writes in the register file and data memory (RegWrite, MemRead, and Mem Write), a 1-bit signal used in determining whether to possibly branch (Branch), and a 2-bit control signal for the ALU (ALUO). An AND gate is used to combine the branch control signal and the Zero output from the ALU; the AND gate output controls the selection of the next PC. Notice that PCSrc is now a derived signal, rather than one coming directly from the control unit. Thus, we drop the signal name in subsequent figures