4) We are interested in two implementations of a machine, one with and one without special floating-point hardware. Consider a program P with the following mix of operations: Instruction Type Floating-point multiply Floating-point add Floating-point divide Integer instructions Frequency in Mix 10% 15 % 5% 70 % Machine MFP (Machine with floating-point) has floating point hardware and can therefore implement the floating-point operations directly. It requires the following number of clock cycles for each instruction class: Instruction Type Floating-point multi Floating-point add Floating-point divide Integer instructions Number of Clock Cvcles 6 4 20 2 Machine MNFP (Machine with no floating-point) has no floating-point hardware and so must emulate the floating-point operations using integer instructions. The integer instructions all take 2 clock cycles. The number of integer instructions needed to implement each of the floating-point operations is as follows: Instruction Type Floating-point multipl Floating-point add Floating-point divide Number of Integer Operations 30 20 50 Assume that both machines have the same clock rate of 100 Mhz Find the MIPS ratings for both machines. If the machine MFP executes 300,000,000 instructions for this program, how many integer instructions does machine MNFP require for the same program? Determine the CPU time for each machine and compare the MIPS ratings with the CPU times for the same machines. Suppose that the research department says that the MFP machine in the previous problem can be re-engineered so that all floating-point instructions run 25% faster. There is no corresponding improvement in the rate of processing integer instruction. What performance gain for the MFP will this improvement produce? a. b. c. d