7.23 c

(b) Using AND and OR gates, find a minimum three-level circuit to realize F (5 gates, 12 inputs) CI 7.23 Implement Na, b.c.d) -E m(3.4.5.6. 7.11. 15) as a two-level gate circuit, using a minimum number of gates. (a) Use AND gates and NAND gates (b) Use OR gates and NAND gates (c) Use NAND gates only 724 (a) Use gate equivalences to convert the circuit into a four-level circuit containing only NAND gates and a minimum number of inverters. (Assume the inputs are available only in uncomplemented form.) (b) Derive a minimum SOP expression for f (c) By manipulating the expression for f. find a three-level circuit containing only five NAND gates and inverters