7.6 in Clements) This question asks you to implement register indirect addressing. For the architecture of Figure P7.1, write the sequence of signals and control actions necessary to execute the instruction ADD (D1), D0 that adds the contents of the memory location pointed at by the contents of register D1 to register D0, and deposits the results in D0. This instruction is defined in RTL form as [D0] [M[D1]] + [D0].