A. (4 points) List registers that are pushed onto the stack during exception processing in the order they are pushed onto the stack B. (4 points) The MSP430FG4618 receives interrupts from parallel ports P2 and Pl in the same clock cycle. Which one is processed first assuming both are enabled and GIE-1? (Hint: you may need to inspect the interrupt vector table entries for MSP430FG4618 in the include file or the reference manual). C. (4 points) What are globally or selectively maskable interrupts? Explain D. (4 points) What happens with the interrupt flag of a single-sourced interrupt during the exception processing (handling interrupt requests in hardware)? E. (4 points) Is it possible to cause an interrupt using only software means (no hardware triggers are present)? Explain