A computer system is specified as having a 32-bit data bus and a 32-bit address bus: What is the maximum number of addressable locations in this system? How many 256M times 8 memory devices are required to fill this address space? Construct a memory map showing the start and end address of each 32-bit block. How many address lines go to each device, and how many need to be decoded? Design the required address decoding for the device chip selects. (Show block diagram and/or Verilog code.) Show how the memory devices will be arranged on the address, data, and control buses. Use a suitable drawing program such as Visio or PowerPoint. A computer system is specified as having a 20-bit address bus and an 8-bit data bus: What is the maximum number of addressable locations in this system? How many 64K times 8 memory devices are required to give the system 512KB of memory? Starting at address 0 times 00000, construct a memory map that shows the address range of each memory device. How many address lines go to each device, and how many need to be decoded? Design the required address decoding logic. (Show block diagram and/or Verilog code.)