a) Design a 1-bit synchronous adder 1BitAdder by composing instances of And, Or, Not, and Xor gates. The component 1BitAdder has three input variables x, y, and carry-in and two output variables z and carry-out. b) Then, design a 4-bit synchronous adder 4BitAdder by composing four instances of the component 1BitAdder. The component 4BitAdder has input variables x0, X1, X2, X3, yo, y1, y2, and y3, and carry-in and has output variables zo, 21, 22, 23, and carry-out. In each round, the 5-bit number encoded by the output variables zo, 21, 22, 23, and carry-out should equal the sum of the 4-bit number encoded by the input variables xo, X1, X2, and x3, the 4-bit number encoded by the input variables yo, y, y2, and y3, and the input value of carry-in