Answered step by step
Verified Expert Solution
Question
1 Approved Answer
A memory block of 256x256 has 1-bit of block select and 8-bits of row address, blksel and raddr[7:0]. Assume that the input capacitance of each
A memory block of 256x256 has 1-bit of block select and 8-bits of row address, blksel and raddr[7:0]. Assume that the input capacitance of each bit cannot exceed 4CX and that PMOS is stronger than NMOip-2. The signal, biksel, arrives d-2 later than the row addresses due to the added load from all the blocks. Using logical effort and techniques taught in class. Design a Static CMOS row decoder without skewing the drive strength ratio. To help estimate wire and side-load capacitance, the access device of the memory cell has a capacitance of 0.5Cx. The wire capacitance running along a cell either width or height is 0.5Cx. Your design should minimize the propagation delay of the raddr to WL. Because of the asymmetry between blksel and raddr, you should reduce power whenever possible and discuss your design choices especially for the blksel path. You should show your work clearly on multiple additional pages but the final design information on the next page. Please feel free to use any mathematical tools as needed. Show all sizes normalized to Cx. min(tpd,WL)- A memory block of 256x256 has 1-bit of block select and 8-bits of row address, blksel and raddr[7:0]. Assume that the input capacitance of each bit cannot exceed 4CX and that PMOS is stronger than NMOip-2. The signal, biksel, arrives d-2 later than the row addresses due to the added load from all the blocks. Using logical effort and techniques taught in class. Design a Static CMOS row decoder without skewing the drive strength ratio. To help estimate wire and side-load capacitance, the access device of the memory cell has a capacitance of 0.5Cx. The wire capacitance running along a cell either width or height is 0.5Cx. Your design should minimize the propagation delay of the raddr to WL. Because of the asymmetry between blksel and raddr, you should reduce power whenever possible and discuss your design choices especially for the blksel path. You should show your work clearly on multiple additional pages but the final design information on the next page. Please feel free to use any mathematical tools as needed. Show all sizes normalized to Cx. min(tpd,WL)
Step by Step Solution
There are 3 Steps involved in it
Step: 1
Get Instant Access to Expert-Tailored Solutions
See step-by-step solutions with expert insights and AI powered tools for academic success
Step: 2
Step: 3
Ace Your Homework with AI
Get the answers you need in no time with our AI-driven, step-by-step assistance
Get Started