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A n ISA of picoProcessor. Your assignment is to design the datapath of a single-cycle processor. You need also to specify all needed control signals

Aimage text in transcribedn ISA of picoProcessor. Your assignment is to design the datapath of a single-cycle processor. You need also to specify all needed control signals and then design the control unit.

Your assignment should include:

1-RTL description

2-Datapath components

3-List of all control signals

4-The datapath with all necessary multiplexors and all control lines identified.

5-Your design of the Control Unit.

The picoProcessor ISA This format is used for shift and rotate instructions that operate on a register value (r). The number of bit posi- tions by which the value is shifted or rotated is given by the shift count (). The result is stored in a destination regist (rd. The shift function code Un) values are: Introduction Operatiorn The picoProcessor (pP) is an 8-bit processor intended for educational purposes. It is similar to 8-bit micropro- cessors for small embedded applications, but has an instruction set architecture more similar to RISC Shift right The pP has separate instruction and data memories. The instruction memory is4K instructions in size, and the data memory is 256 bytes. The pPan also address I/O devices using up to 256 nput ports and 256 output ports. Within the processor there are eight 8-bit general purposes registers, rOto r7. RO is always read as zero and ig nores writes. There is also a return-address stack of implementation-defined depth (at least four entries), an in- terrupt return register and Zero (Z) and Carry (C) condition codes. The Z condition code is set to l if the result is zero, otherwise it is set to 0The Coondition code is set to the vakue of the bit shifted or rotaed out of the operand value Memory and V O Instructions Instruction Instructions in the pP are all 19 bits long, and are encoded in several formats. ALU Reg-Reg Instructions This format is used for memory and I/O load and store instructions. The effective address is calculated by adding a signed displacement (dis) to the value of a base address register(). For memory instructions, the effective address is used to access the data memory, and for IO instructions, it is used as the L/O port number. For oad instructions, ro is the destination register (n) values are: and for store instruction rd is the source regiter. The function code This format is used for arithmetic and logical in tructions that operate on two register values (r result is stored in a destination register (rd). The function code () values are: and r2). The Operation ad withbuf carry in Subtract with carry in 011 The Z and Ccondition codes are unaffected by these instructions. Bitwse logca icushe or Conditional Branch Instructions 110 mask jandeot) The Z condition code is set to if the result is zero, otherwise it is set to 0.For ADD and ADDC. the C condition co ets the carry out ofthe addition Fr SUB and SU C Cts the bor ow outofthe subtraction and indicates that the operation overflowed to a negative result. For logical operations, C is always set to o. s format is u sed for conditional branch instructions. The target address is calculated by adding a signed dis- placement (di )tothe addre oftenstruction following the branch lfthecondition specified by the branch is true, control is transferred to the instruction at the target address; otherwise control continues with the instruc- tion following the branch. The function code (in) values are ALU Reglmmed Instructions nd This format is used for arithmetic and logical instructions that operate on a register value (rl) and an immediate constant value (s). The result is stored in a destination register (rd). The function code (fn) values and the condition code settings are the same as for ALU Reg-Reg instructions. The Z and C condition codes are unalfected by these instructions Shift Instructions Jump Instructions addr ISB This format is used for unconditional jump instructions. Control is transferred to the instruction at the target address

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