Assume the following latencies for individual pipeline stages. For the EX stage, latencies are given separately for a processor without forwarding and for a processor with different kinds of forwarding. IF 150ps, ID 100ps, EX (no FW)- 120ps, EX (full FW) - 150ps, EX (FW from EX/MEM only)-140ps, EX (FW from MEM/WB only)-130ps, WB - 100ps 1) If we use no forwarding. what fraction of eycles are we staling due to data hazards? 2) If we use full forwarding (forward all results that can be forwarded), what fraction of cycles are we stalling due to data hazards? Assume the following latencies for individual pipeline stages. For the EX stage, latencies are given separately for a processor without forwarding and for a processor with different kinds of forwarding. IF 150ps, ID 100ps, EX (no FW)- 120ps, EX (full FW) - 150ps, EX (FW from EX/MEM only)-140ps, EX (FW from MEM/WB only)-130ps, WB - 100ps 1) If we use no forwarding. what fraction of eycles are we staling due to data hazards? 2) If we use full forwarding (forward all results that can be forwarded), what fraction of cycles are we stalling due to data hazards