Assume, we want to execute the following instructions in 5-stage MIPS pipeline that we discussed in the classroom lw $12, 0(Sto) add $t4, St1,St2 sw $t4, 12(St0) lw $t3, 8(St0) add $t5, St1,$t3 sw $t5, 16(Sto) Find the hazards in the code and show when the pipeline stalls occur. Then, see if forwarding carn eliminate any of these hazards, and show the forwarding paths (if any). If there are remaining hazards (after forwarding), try to reorder the instructions to avoid any remaining pipeline stalls. Find the number of cycles needed to finish the execution of these instructions when pipeline stalls occur (before forwarding and code reordering), and when there is no pipeline stalls (ie. after forwarding and code reordering). Show the reordered code. Show how instructions progress within the pipeline (before and after forwarding/code reordering). You can use the following representation for the pipeline to simplify the depiction (this is for just illustration purpose). cc1 cc2 cc3 cc4 cc5cc6 cc7 cc8 cc9 (clock cycle) Instructionl IF ID EX MEM WB Instruction2 Instruction3 IF ID EX MEM WB IF ID stall EX MEM WB