Assuming the cache is filled with the following data:

	cache way 1			cache way 2
Line Number	Valid Bit	Tag	Data	Valid Bit	Tag	Data
...
00...00011	1	00...01	...	1	10...00	...
...
00...01000	1	10...01	...	0	00...10	...
00...01001	0	10...00	...	1	00...00	...
...

In this table, ... represents a sequence of zero(s)

Given the following memory references, identify each of them as a cache hit (write H in the blank) or a cache miss (write M in the blank). Also explain.

Hints: The valid bit indicates a cache entry that is not actually valid anymore for some reason (maybe cache invalidated because of write in other core/cache for example). So if a reference resolves to a line that is not valid, it is still a miss. Make sure you correctly identify the line and tag when determining a hit or miss here.

Tag	Line	Word Offset
00...00	00...01001	1100100

Tag	Line	Word Offset
10...00	00...01001	0110110

Tag	Line	Word Offset
10...01	00...00011	1110011

Tag	Line	Word Offset
10...00	00...00011	0110110

Tag	Line	Word Offset
10...01	00...01000	0100010