b) The memory of our processor consists of 24 memory locations, as depicted in Figure 1(b). Each location can store one 16 bit number and the instruction set is shown in Figure 1(c). (8) (16) i. Describe the format of the 16 bit instruction code. ii. Write the machine code to subtract two numbers stored in MEM[0x33] and MEM[0x32]. If they are the same store the number in a memory location of your choice. Note: You must describe fully the design process in generating the machine code and which memory locations you would not place data into. Ox00 Ox28 Ox01 Ox29 Ox02 Ox2A Ox03 0x2B Ox04 Ox2C Ox05 Ox2D Ox06 Ox2E Ox07 0x2F Ox08 Ox30 Ox09 0x31 OXOA 0x32 0x33 OxOB Figure 1(b) Instruction Set MEMS: contents of memory location with address S A is the single 16 bit CPU register 4 bit Opcode (in het 0 1 2 Effect Instruction Load A LDAS Store A SIAS Add to ADDS Subtract from A SUBS JUMP JMPS Jump if GT Equal GES Jump it Not Equal INES Stop STP 4 5 6 Figure 1(c) b) The memory of our processor consists of 24 memory locations, as depicted in Figure 1(b). Each location can store one 16 bit number and the instruction set is shown in Figure 1(c). (8) (16) i. Describe the format of the 16 bit instruction code. ii. Write the machine code to subtract two numbers stored in MEM[0x33] and MEM[0x32]. If they are the same store the number in a memory location of your choice. Note: You must describe fully the design process in generating the machine code and which memory locations you would not place data into. Ox00 Ox28 Ox01 Ox29 Ox02 Ox2A Ox03 0x2B Ox04 Ox2C Ox05 Ox2D Ox06 Ox2E Ox07 0x2F Ox08 Ox30 Ox09 0x31 OXOA 0x32 0x33 OxOB Figure 1(b) Instruction Set MEMS: contents of memory location with address S A is the single 16 bit CPU register 4 bit Opcode (in het 0 1 2 Effect Instruction Load A LDAS Store A SIAS Add to ADDS Subtract from A SUBS JUMP JMPS Jump if GT Equal GES Jump it Not Equal INES Stop STP 4 5 6 Figure 1(c)