C$.$ Showthepipelinedexecutionifthepipelinehasnobypassing,andtheregisters cannot be read and written in the same clock cycle. Compute the total execution time. To answer this question, and the other similar questions, you need to fill the chart below. You can expand the chart vertically and horizontally as needed. Make sure to insert the NOP instructions when needed.

SW $s$0,80($$s$3)$ IF ID EXE MEM WB

D$.$ Showthepipelinedexecutionifthepipelinehasnobypassing,andtheregisters can be read and written in the same clock cycle. Compute the total execution time.

E$.$ Show the pipelined execution if the pipeline supports bypassing, and the

registers can be read and written in the same clock cycle. Compute the total execution time.

F$.$ Compute the speedup achieved by the pipelined execution that implements bypassing and allows the registers to read and write in the same clock cycle $($point E$)$ compared to the pipelined execution that does not implement bypassing and does not allow the registers to read and write in the same clock cycle $($point C$).$

Serial execution:

G$.$ Assume that of all execution stages $($IF$,$ ID$,$ EXE, MEM, WB$)$ requires the same time $(2$ ns$).$ What is the length of the clock cycle that should be used if a single$-$ cycle processor $($i$.$e$.$ unpipelined processor$)$ is used to run the instructions listed above instead of the pipelined processor? Also, Compute the total execution time that is required to run the five instructions listed above.

H$.$ What is the speedup achieved by the pipelined execution that implements bypassing and allows the registers to read and write in the same clock cycle $($point E$)$ compared to the unpipelined execution $($point G$)?$