can you explain and show how to do #5

Prelab Requirements: Use the device data sheets available on the class web-site to answer the following questions. 1. What is the typical propagation delay in nanoseconds for the 74LS02, 74LS27 and 74LS04 logic gates? 2. What is the maximum propagation delay in nanoseconds for the 74LS02, 74LS27 and 74LS04 logic gates? 3. Develop truth tables and timing diagram for output versus inputs. Use minimal multilevel logic design and 2-input, 3-input NOR gates and inverter gates only to design the following: F(A, B, C, D = IIM((2, 4, 5, 6, 8, 10, 12, 13). IID(0, 11) 4. Using LogicSim to make simulations (includes all combinations for A, B, C, and D with word generator). 5. Making chip placements on the breadboard