comment on every line while writing verilog

Part 1: Circuit Design (20 Points) In class we have talked about MST this week, you are now going to make use of that to implement a circuit in a very quick fashion. Your lab kit contains a "74138" that you could use to implement the functions FI-10,3,6,7) and F2-(1.3.6) at the same time. Create the schematic to implement this system following the constraints of the "74138". Include all appropriate resistors and LEDs. When duwing the decoder, use the block symbol. Enable is considered as an input and should be treated as such with resistors and LEDs. Part 2: Verilog Implementation (60 Points) You are going to implement this combinational logic system using structural verilog and modular instantiation design only. All modules will be put in the design.sv file and the testbench will be put in the testbench sv file. Every line must have a comment, comments are 30% of the grade for each part of the lab. You must include the proper header in both the design file and the test bench file Proper header I/ Name: Assignment: Purpose of Program: The first thing you are going to create is alto 2 decoder in structural verilog. Call this module decto2. (5 Points) Next you are going to leverage Shannon's Expansion Theory and modular design to build a 20 4 decoder. You will implement this idea tied to the enable on the decoder. This module will leverage the instantiation of your deco2 module. Call this module de 2104 (6 Points) Finally you are going to build your to decoder module using the modules you previously developed. Call this module dec3108. (6 Points) Now that w o nderforms willing the module som Next you are going to leverage Shannon's Expansion Theory and modular design to build a 2 to 4 decoder. You will implement this idea tied to the enable on the decoder. This module will leverage the instantiation of your dec Ito2 module. Call this module dec2104. (6 Points) Finally you are going to build your 3 to 8 decoder module using the modules you previously developed. Call this module dec3t08. (6 Points) Now that you have your decoder ready for use, you will use that module to take your system inputs and produce your two functions, F1 and F2. This module will take in the 3 input signals: A, B, and C; along with an enable. It will return the outputs F1 and F2. Call this module lab7_design. (15 Points) Now that you have your system, it is time to verify the behaviors using a test bench. The test bench consist of several components. Compiler directive to standardize time (2 Points) Module declaration for the test bench (2 points) Declaration of the reg variables to be used as inputs (2 Points) Declaration of the wire variables that are used for the outputs (2 points) Initialization of the reg variables (2 Points) Instantiation call to your lab7design module (2 Points) Behavioral block of the pattern you are testing with (you should have it go through all 8 possibilities) (2 Points) Initialization block to create the log display (2 Points) Initialization block to define the duration of the test (2 Points)