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Compare the four instruction set architectures (Accumulator, Stack, Two address load-store and three address memory-memory architectures) Question 2. Comparing the four instruction set architectures Please
Compare the four instruction set architectures (Accumulator, Stack, Two address load-store and three address memory-memory architectures)
Question 2. Comparing the four instruction set architectures Please base your answers on the code in the posted solutions (rather than on the code you turned in). Make a table to compare the four architectures, showing: (a) The code size in bytes needed to implement A =A+A*D. [Note which architectures result in less demand for program memory.] (b) The percentage efficiency of the code. This is the percentage of code bits that are useful, that is, not just zero-filled to make all instructions a fixed length. [Note which architectures use program memory more efficiently.] (C) The number of bytes of data transferred between the data memory and the processor when running the code. [Note which architectures require fewer data transfers.) (d) The total number of bytes (both data and program) transferred to/from memory (This is a very important metric for self-powered applications, since accessing memory is one of the most power-hungry things a processor does. Note which architectures will consume less power consumption due to memory transfers.] Question 2. Comparing the four instruction set architectures Please base your answers on the code in the posted solutions (rather than on the code you turned in). Make a table to compare the four architectures, showing: (a) The code size in bytes needed to implement A =A+A*D. [Note which architectures result in less demand for program memory.] (b) The percentage efficiency of the code. This is the percentage of code bits that are useful, that is, not just zero-filled to make all instructions a fixed length. [Note which architectures use program memory more efficiently.] (C) The number of bytes of data transferred between the data memory and the processor when running the code. [Note which architectures require fewer data transfers.) (d) The total number of bytes (both data and program) transferred to/from memory (This is a very important metric for self-powered applications, since accessing memory is one of the most power-hungry things a processor does. Note which architectures will consume less power consumption due to memory transfers.]Step by Step Solution
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