Answered step by step
Verified Expert Solution
Link Copied!

Question

1 Approved Answer

Compare the four instruction set architectures (Accumulator, Stack, Two address load-store and three address memory-memory architectures) Question 2. Comparing the four instruction set architectures Please

Compare the four instruction set architectures (Accumulator, Stack, Two address load-store and three address memory-memory architectures)

image text in transcribed

Question 2. Comparing the four instruction set architectures Please base your answers on the code in the posted solutions (rather than on the code you turned in). Make a table to compare the four architectures, showing: (a) The code size in bytes needed to implement A =A+A*D. [Note which architectures result in less demand for program memory.] (b) The percentage efficiency of the code. This is the percentage of code bits that are useful, that is, not just zero-filled to make all instructions a fixed length. [Note which architectures use program memory more efficiently.] (C) The number of bytes of data transferred between the data memory and the processor when running the code. [Note which architectures require fewer data transfers.) (d) The total number of bytes (both data and program) transferred to/from memory (This is a very important metric for self-powered applications, since accessing memory is one of the most power-hungry things a processor does. Note which architectures will consume less power consumption due to memory transfers.] Question 2. Comparing the four instruction set architectures Please base your answers on the code in the posted solutions (rather than on the code you turned in). Make a table to compare the four architectures, showing: (a) The code size in bytes needed to implement A =A+A*D. [Note which architectures result in less demand for program memory.] (b) The percentage efficiency of the code. This is the percentage of code bits that are useful, that is, not just zero-filled to make all instructions a fixed length. [Note which architectures use program memory more efficiently.] (C) The number of bytes of data transferred between the data memory and the processor when running the code. [Note which architectures require fewer data transfers.) (d) The total number of bytes (both data and program) transferred to/from memory (This is a very important metric for self-powered applications, since accessing memory is one of the most power-hungry things a processor does. Note which architectures will consume less power consumption due to memory transfers.]

Step by Step Solution

There are 3 Steps involved in it

Step: 1

blur-text-image

Get Instant Access to Expert-Tailored Solutions

See step-by-step solutions with expert insights and AI powered tools for academic success

Step: 2

blur-text-image

Step: 3

blur-text-image

Ace Your Homework with AI

Get the answers you need in no time with our AI-driven, step-by-step assistance

Get Started

Recommended Textbook for

Database Driven Web Sites

Authors: Joline Morrison, Mike Morrison

2nd Edition

? 061906448X, 978-0619064488

More Books

Students also viewed these Databases questions