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Computer Architecture. Complete all probelms and show work, please and thank you. EVERY QUESTION MARK? OUTSIDE PARENTHESIS IS A Y _ ; INSIDE

Computer Architecture. Complete all probelms and show work, please and thank you. EVERY QUESTION MARK"?" OUTSIDE PARENTHESIS IS A "Y_"; INSIDE PARENTHESIS IS "X_"WHEN I CHANGED THE ? TO y AND x CHEGG WOULDN'T LET ME UPLOAD THE QUESTION. SORRY FOR THE INCONVIENCE.
1.)Obtain SOP Expansions of the Boolean functions _0(_0,_1,_2),_1(_0,_1,_2) and y_2(_0,_1,_2)2.)(15 points) Obtain POS Expansions of the Boolean functions 0(0,1,2),1(0,1,2) and y_2(_0,_1,_2)3.)Using K-Map, simplify the Boolean functions 0(0,1,2),1(0,1,2) and y_2(_0,_1,_2) obtained in (1.)4.)(15 points) Using K-Map, simplify the Boolean functions 0(0,1,2),1(0,1,2) and y_2(_0,_1,_2) obtained in (2.)5.)(10 points) Considering _0(_0,_1,_2),1(_0,_1,_2) and _2(_0,_1,_2) obtained in (3.), draw the schematic of the logical circuit Figure-1 using three basic gates only (2-input AND gates, 2-input OR gates, NOT gates).6.)(10 points) Considering _0(_0,_1,_2),_1(_0,_1,_2) and _2(_0,_1,_2) obtained in (4.), draw the schematic of the logical circuit Figure-1 using three basic gates only (2-input AND gates, 2-input OR gates, NOT gates).7.)(20 points) Considering _0(_0,_1,_2),_1(_0,_1,_2) and _2(_0,_1,_2) obtained in (3.), draw the schematic of the logical circuit Figure-1 using three 4x1 multiplexers with selection inputs (B,C)(and also basic gates if required).
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