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Consider a 2 5 6 K 1 6 RAM chip. ( a ) What is the size of memory ( in bytes ) provided by
Consider a RAM chip.
a What is the size of memory in bytes provided by one RAM chip?
b How many data lines and address lines for the RAM chip above?
c Assume that the RAM chip uses coincident decoding to select one RAM
cell, where a toline decoder is used as the row decoder. What is the size of
the column decoder in the RAM chip?
d Consider the to digits of your student ID as a number in hexadecimal
representation. The bit binary representation of appended with all s in front of
to form an bit address line, is the address input to the RAM chip above.
i Write down the bit representation of the address input binary format to the
RAM chip.
ii Determine the row and column selection lines that are enabled with the above
input address. Specify your results in decimal values.
e Suppose a large memory, which has bit word, is constructed by pieces of
RAM chips above. The capacity of the large memory is bytes, where is
determined by the digit of your student ID:
use the following student ID to
solve this question A
i How many words are stored in the large memory? Hence, write down the
number of address lines for the large memory.
ii Calculate the value of above.
iii How many of the address lines are connected to the address inputs of all RAM
chips? How many of them are connected to the decoder which produces the
Chip Select inputs for the RAM chips?
iv Specify the size of the decoder used in the large memory to produce the Chip
Select inputs for the RAM chips.
v Describe the changes in the design of the large memory if the word size, and
subsequently the capacity of the large memory are both doubled.
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