Consider a pipelined execution of the following program segment in which the instruction labeled Beg starts at memory address (2040)10. All registers used contain 0 initially.

Beg: add $8, $9, $10

beq $5, $6, Nex

lw $7, 30($13)

sw $14, 48($15)

Nex : and $11, $12, $13

1. Show the state of the 5-stage pipeline (i.e. the pipelined execution representation) for the instructions above.

2. Assume the time for stages is 100ps for register read or write, and 200ps for other stages. Compute the total time required for each of the instructions used in the program segment above.

3. Compare the total execution time for non-pipelined and pipelined execution of the above program segment:

Non-pipeline design = ______________ ps

Pipelined design = ______________ ps

_________________ design is _________ times faster