Consider an architecture with 16 instructions. The mnemonics and their opcodes are: Add Subtract Subtract Multiply Multiply Divide Divide NOT AND OR NO 0 1 2 3 4 4 5 6 5 6 XOR 7 9 Store Load Load T um Jump cond jump Call Return SVC CopyReg 8 DE The instruction format for the Load & Store instructions is shown below. 32 bit total length opcode register index register memory address 4 bits 4 bits 4 bits 20 bits The 16 bit instruction format for the Add, Subtract, Multiply, Divide, AND, OR, XOR, NOT and CopyReg instructions is shown below. opcode reg 1 reg 2 reg 3 4 bits 4 bits 4 bits 4 bits 3. [12 points) For each machine language instruction in the above architecture, write the equivalent assembler language. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Assembler 1lolololololololololololololololololololololololololo 1 1 0 10111100 110 1101 ololololo 0 0 1 1 0 0 1 0 0 1 0 0