Question: Consider an L 1 cache that has 8 sets, is direct - mapped ( 1 - way ) , and supports a block size of

Consider an L1 cache that has 8 sets, is direct-mapped (1-way), and supports a block size of 64 bytes. How many bits of the address are used to calculate the offset, index, and tag (assume that the CPU generates 32-bit addresses)? For the following memory access pattern (shown as byte addresses), show which accesses are hits and misses. For each hit, indicate the set that yields the hit.
40,96,112,24,400,500,560,32,600,48,80.

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