Consider the following: The MIPS exception mechanism is implemented by the coprocessor 0. The CPU operates in one of the two possible modes: user and kernel. User programs run in user mode. The CPU enters the kernel mode when an exception happens. Coprocessor 0 can only be used in kernel mode. Match the descriptions below with the appropriate term.

Descriptions:

a. Synchronous unexpected event causing program-to-kernel transfer of control (i.e. program attempts some illegal operation)

b. Aynchronous, device-initiated transfer of control (i.e I/O device status change, I/O device error condition)

c. Collection of services that are invoked using a syscall instruction

d. Synchronous planned program-to-kernel transfer of control (i.e. program request to the operating system for service)

Terms:

1. exception handler

2. syscall

3. exception

4. interrupt