Consider the timing diagram of Figure $1,$ where the following phases are observed FI: Fetch Instruction

DI: Decode Instruction

CO: Operand address prepare

FO: Fetch Operands

EI: Execute Instructions

WO: Write results

Assume that the code will be ported to run on a machine with only a two stage pipeline $($fetch$,$ execute$).$ Redraw the diagram to show how many time units are now needed for four instruction.

A$.$ How much speed up does the $6$ stage pipeline offer compared to the $2$ stage pipeline

B$.$ How much speedup does the $2$ stage pipeline offer compared to sequential $($un$-$pipelined$)$ processing