Digital design, logic gates, Boolean algebra

n-BIT MAXIMUM VALUE SELECTOR

Consider a simple device that takes two n-bit unsigned magnitude binary inputs A and B representing two numeric values ranging from zero to (2^n) - 1. The n inputs for A are represented by input variables A(n-1) through A0. Values for B and C are represented similarly. The n-bit output C of the device will be the GREATER of the two binary values presented on the n-but inputs A and B.

Design a 1-bit maximum value selector designed to be used to solve larger problems using an iterative design approach. This may require your one-bit design to have ADDITIONAL inputs and/or outputs that are used by the 1-bit devices to communicate information about the progress of the overall task to EACH OTHER. What information might one stage of the device need to communicate to other stages of the device? In which direction does information need to follow (MSB->LSB or LSB ->MSB)? Test your design.

Then construct a 4-bit maximum value selector (two 4-bit inputs A[3:0] and B[3:0], and one 4-bit output C[3-0]) using YOUR 1-bit bit maximum value selector designed for iterative implementation. Test it.