Draw the block diagram of a floating point adder given in Figure 3.15 using IEEE single-precision format, compute correctly normalized and rounded result for the floating-point addition operation (+5.25) + (-1.5). Show all the intermediate computations on the circuit to get full credit (such as the number and type of shifts, sign bits, rounding etc.) .

3.5 Floating Point 207 Fracton Sign Exponent Sign Exponent Fraction Compare Small ALU Exponent difference 1 1 Shift smaller Control Shift right number right Big ALU 01 increment or Shift left or right Rounding hardware Round Fracton Sign Exponent FIGURE 2.15 Block diagram of an arithmetic unit dedicated to floating-point addition. The steps of Figure 3.14 correspond to each block, from top to bottom. First, the exponent of operand is subtracted from the other using the small ALU to determine which is larger and byhow much. This difference controls the three multiplexors fromleft to right, they select the larger exponent, the significand ofthe smaller number, and the significand ofthe larger number. The smaller significand is shifted right, and then thesignificands are added together using the big ALU The normalization step then shifts the sum left or right and increments or decrements the exponent. Rounding then creates the final result, which may require normalizing again to produce the actual final result