For the first task in Lab 7, you will be designing the two-bit, up/down, binary counter that was discussed in lecture. The binary counter should have the ability to count in both the up (increasing) and down (decreasing) directions. Furthermore, the counter should have a run input that acts as an enable to the counter. Lastly, there should also be an initialize input that, when active, initializes the counter to state S1 (Count = 01). 1. Using your lecture notes as reference, design the counter using the standard Multisim PLD parts. Make sure that you include the CLK input in your PLD design. This will give you access to the Basys3 system clock and allow you to use it as the clock input to your counter. Furthermore, attach LEDs to the output pins so that you can verify that the counter is actually counting. You will need three switches for the three inputs, and six LEDs for the outputs; that is, two LEDs for the count value, and four LEDs for each of the states. 2. Once you have designed and tested the counter with simulation, compile the design and verify that you are able to attain an error-free compilation. Remember, avoid unconnected connectors and other bad Multisim practices. 3. Once you are able to successfully compile your design, download the counter on to the target board and test your circuit.