For the following snippets of assembly, determine the type of the hazard$($s$),$ which instruction$($s$),$

and which register$($s$)$ it occurs for. Assume the forwarding logic has been implemented, and the

branch misprediction penalty is $4$ cycles. Assume there is code above and below the provided

code. Each part of this question is independent from the other parts.

Example:

AND R$3,$ R$5,$ R$7$

ADD R$6,$ R$3,$ R$7//$ Data Hazard, R$3($Read after Write$)$

a$.$ ADD R$1,$ R$2,$ R$3$

SUB R$8,$ R$1,$ R$2$

AND R$3,$ R$3,$ R$2$

b$.$ ADD R$1,$ R$2,$ R$3$

STR R$1,[$R$2,$ #$0]$

SUB R$2,$ R$1,$ R$2$

LDR R$3,[$R$2,$ #$0]$

c$.$ LSL R$1,$ R$3,$ #$2$

ADD R$1,$ R$1,$ R$4$

B END

LSL R$1,$ R$4,$ #$2$

ADD R$1,$ R$2,$ R$5$

END

d$.[$For this question, Let R$1=0,$ R$2=7,$ R$4=3]$

START

ADD R$3,$ R$2,$ R$4$

AND R$4,$ R$2,$ R$4$

CMP R$3,$ R$4$

BLT START

SUB R$0,$ R$4,$ R$3$

STR R$0,[$R$2,$ #$8]$