Given a Fully Associative cache with 4 lines using LRU replacement. The word size is one byte, there is one word per block, and the main memory capacity is 16 bytes. Suppose the cache is initially empty and then the following addresses are accessed in the order listed: {3, 4, 3, 7, 7, 12, 4, 8, 3, 12, 7, 9}. How many bits are in the tag field? (.e. the tag itself not including any counter bits). After execution all of the above references, what are the final contents of the cache? State your answer as the set of memory addresses whose data resides in cache, e.g."{3, 4, 8, 12}". For instance, if memory [3], memory [4], memory[8], and memory[12] resided in cache then the answer is stated as "{3, 4, 8, 12}". What is the hit rate? Express your answer as a percent. How many Compulsory Misses occurred