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I need help with the following computer architecture question: 1. For each instruction, what are the values generated by the ALU Contr! in the figure
I need help with the following computer architecture question:
1. For each instruction, what are the values generated by the ALU Contr! in the figure below? Write your answe r in the table below. bea $tl, $t2, 100 slt $t3, $t4, $t5 Sw $t6, 20 ($t7) (a) Add ALU Addresult 4 Shift left 2 RegDst Branch MemRea MemtoR AL instruction[31-26]|control ALUSrc RegWrite Instruction [25-21 Read register 1 Read Instruction [20-16 Read data 1 Read PCRead address Zero register 2 Instruction [31-0] ALU AL Read Address data-M M Write data 2 result ul LI Write data Registers Write Data data 16 Sign- extend 32 Instruction [15-0] ALU control Instruction [5-0] ALU Control Value Instruction beg tl, $t2, 100 $t6, 20 ($t7) $t8, 10 ($t9) 1. For each instruction, what are the values generated by the ALU Contr! in the figure below? Write your answe r in the table below. bea $tl, $t2, 100 slt $t3, $t4, $t5 Sw $t6, 20 ($t7) (a) Add ALU Addresult 4 Shift left 2 RegDst Branch MemRea MemtoR AL instruction[31-26]|control ALUSrc RegWrite Instruction [25-21 Read register 1 Read Instruction [20-16 Read data 1 Read PCRead address Zero register 2 Instruction [31-0] ALU AL Read Address data-M M Write data 2 result ul LI Write data Registers Write Data data 16 Sign- extend 32 Instruction [15-0] ALU control Instruction [5-0] ALU Control Value Instruction beg tl, $t2, 100 $t6, 20 ($t7) $t8, 10 ($t9)Step by Step Solution
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