i want the verilog code for this project to implement it on the FPGA board Part 1:

Digital Timer :

Requirement In this part, you will program all the seven-segment displays as a "DIGITAL TIMER" with countdown functionality. The two displays on the most left will display the hours (00 to 59), the second two displays will display the minutes (00 to 59). Then two displays to show minutes (00 to 59). Finally, the last two shall display the part of seconds (00 to 99).

Features:

1- You should order the displays as described above. Use one push-button to reset the clock to a specific value.

2- This value should be as follows 00:03:XX:XX, where XXXX are the last non zero numbers of your ID.

3-The speed of the clock must be Similar to the normal clock, try to make it as close as possible to the real seconds.

4- Use one switch to select between the above-mentioned speed and another Slower speed. Since this is a timer, in minutes digits the number 60 will never be shown as well as the number 60 in seconds digits.

You should show an indication that the timer is finished. Part 2: Manual Settings

Requirement In this part, you will add an option to allow the user to modify the timer settings. The user will use the four pushbuttons to change and navigate between the digits.

Features :

1- Use one switch to enable the user inputs.

2-Use the right and left buttons to navigate between the digits.

3-Use the up and down buttons to change the digits values.

4-When this mode is selected, the timer should stop counting.