If r3 has the base of the array A and r2 corresponds to h, the assignment statement. A[30] h A[30]; = + is compiled into LDR r5, [r3,#120] ; Temporary reg r5 gets A[30] ADD r5, r2, r5 Temporary reg r5 gets h + A(301 STR r5, [r3, #120] ; stores h + A[30] back into A[30] What is the ARM machine language code for these three instructions? Instruction Format Cond Fop S R Rd Operand2 ADD SUB (subtract) P 14 O 4en reg reg DP DP 14 1 4en 0 reg reg constant DT DT 14 1 n.a. 25e n.a. reg reg address 0 2Sten reg reg ree ADD (immediate) LDR (load word) STR (store word) 14 1 n.a. 24n n.a. reg reg address FIGURE 2.5 ARM instruction encoding. In the table above, "reg" macans a regisser namber between 0 and 15, "coestant" means a 12-bit constant. "address" means a 12-bit address "n.a." (not applicable) means this fi eld does not appear in this format, and Op stands for opcode Sol: For convenience, let's first represent the machine language instructions using decimal numbers, then determine the three machine language instructions: 12 Opernad2 Cond Rn Rd opcode S 4 bit 2 bit 1 bit 4 bit 1 bit 4 bit 4 bit 12 bit Fill in binary equivalent of the deceimal numbers Offset12 Cond Fopcode opcode S Rn Rd rna Note the similarity of the binary representations of the first and last instructions. The only difference is in the last bit of the opcode