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Implement FIA, B, C,D)-2m(0,2,5,7,8,10) using an 8 to 1 multiplexor and minimal other gates. 8 to 1 MUX S2 S1 S0

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Implement FIA, B, C,D)-2m(0,2,5,7,8,10) using an 8 to 1 multiplexor and minimal other gates. 8 to 1 MUX S2 S1 S0

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