In a computer system, the sizes of the address bus and data bus are 20 bits and 8 bits, respectively. The system includes a cache memory that can hold 1 KB data. Suppose you are running a program with the following data access pattern. Numbers show the addresses (as hexadecimal numbers) of data being accessed consecutively. The pattern is executed only once. At the beginning the cache memory is empty $00014, $00016, $00019, $00410, $00017

Q) Data transfers between main and cache memories are performed using blocks of 16 bytes. The cache control unit uses the direct mapping technique.

For each address in the given data access pattern, write whether there is a hit or miss in the cache memory.