In the following code section, the address of the first instruction is 02A9A3AE in hexadecimal. begin: (481 instructors) beg $56, $56, end (785 instructors) end: add $t1, St2, $t3 Suppose the instruction beqSs6, Ss6, end is executed by the processor shown in the diagram below. Right before the instruction is executed, ($56) = 451 (in decimal), and ($t0) = 451 (in decimal). Provide the values sent to the following ports: Write register of Registers (in binary) Read register 1 of Registers (in binary) Write data of Registers (in hexadecimal Also provide the output from the following ports/units: ALU result of branch adder (in hexadecimal) Read data 1 of Registers (in hexadecimal) Read data 2 of Registers (in hexadecimal) as well as the following control signals: MemtoReg (1 bit) Branch (1 bit) Jump (1 bit) If the value cannot be known (for example the output of data memory when it is written), or if it is a control signal that does not matter, mark it with an X. Please provide the answer as a sequence of number separated by comma, e.g. 00110, ABCD1234,8,0,11001,1234ABCD,1,X,0. Use uppercase letters for hexadecimal digits. Instruction (25-01 Shim lett 2 Jump address (31-0 PC.4031-28 Branch Adder Rogst PC Adder Branch MemRead Instruction (31-26] Control ALUOD ALUSIC instruction 25-211 struction 2018 register 1 Read Read register ALU ALU Instruction (31-0 Instruction memory wito M Instruction 15-11 data Registers In the following code section, the address of the first instruction is 02A9A3AE in hexadecimal. begin: (481 instructors) beq $56, $56, end (785 instructors) end: add $t1, $t2, $t3 Suppose the instruction beq $s6, $s6, end is executed by the processor shown in the diagram below. Right before the instruction is executed, ($56) = 451 (in decimal), and ($t0) = 451 (in decimal). Provide the values sent to the following ports: Write register of Registers (in binary) Read register 1 of Registers (in binary) Write data of Registers (in hexadecimal) Also provide the output from the following ports/units: ALU result of branch adder (in hexadecimal) Read data 1 of Registers (in hexadecimal) Read data 2 of Registers (in hexadecimal) as well as the following control signals: MemtoReg (1 bit) Branch (1 bit) Jump (1 bit) If the value cannot be known (for example the output of data memory when it is written), or if it is a control signal that does not matter, mark it with an X. Please provide the answer as a sequence of number separated by comma, e.g, 00110, ABCD1234,X,0,11001,1234ABCD, 1,X,0. Use uppercase letters for hexadecimal digits. In the following code section, the address of the first instruction is 02A9A3AE in hexadecimal. begin: (481 instructors) beg $56, $56, end (785 instructors) end: add $t1, St2, $t3 Suppose the instruction beqSs6, Ss6, end is executed by the processor shown in the diagram below. Right before the instruction is executed, ($56) = 451 (in decimal), and ($t0) = 451 (in decimal). Provide the values sent to the following ports: Write register of Registers (in binary) Read register 1 of Registers (in binary) Write data of Registers (in hexadecimal Also provide the output from the following ports/units: ALU result of branch adder (in hexadecimal) Read data 1 of Registers (in hexadecimal) Read data 2 of Registers (in hexadecimal) as well as the following control signals: MemtoReg (1 bit) Branch (1 bit) Jump (1 bit) If the value cannot be known (for example the output of data memory when it is written), or if it is a control signal that does not matter, mark it with an X. Please provide the answer as a sequence of number separated by comma, e.g. 00110, ABCD1234,8,0,11001,1234ABCD,1,X,0. Use uppercase letters for hexadecimal digits. Instruction (25-01 Shim lett 2 Jump address (31-0 PC.4031-28 Branch Adder Rogst PC Adder Branch MemRead Instruction (31-26] Control ALUOD ALUSIC instruction 25-211 struction 2018 register 1 Read Read register ALU ALU Instruction (31-0 Instruction memory wito M Instruction 15-11 data Registers In the following code section, the address of the first instruction is 02A9A3AE in hexadecimal. begin: (481 instructors) beq $56, $56, end (785 instructors) end: add $t1, $t2, $t3 Suppose the instruction beq $s6, $s6, end is executed by the processor shown in the diagram below. Right before the instruction is executed, ($56) = 451 (in decimal), and ($t0) = 451 (in decimal). Provide the values sent to the following ports: Write register of Registers (in binary) Read register 1 of Registers (in binary) Write data of Registers (in hexadecimal) Also provide the output from the following ports/units: ALU result of branch adder (in hexadecimal) Read data 1 of Registers (in hexadecimal) Read data 2 of Registers (in hexadecimal) as well as the following control signals: MemtoReg (1 bit) Branch (1 bit) Jump (1 bit) If the value cannot be known (for example the output of data memory when it is written), or if it is a control signal that does not matter, mark it with an X. Please provide the answer as a sequence of number separated by comma, e.g, 00110, ABCD1234,X,0,11001,1234ABCD, 1,X,0. Use uppercase letters for hexadecimal digits