In this exercise, we look at how software techniques can extract instruction level parallelism (ILP) in a common vector loop The following loop is the so called DAXPY loop (double precision aX plus Y ) and is the central operation in Gaussian elimination The following code implements the DAXPY operation, Y aX Y , for a vector of length 100 Initially, R1, is set to the base address of array X and R2 is set to the base address of array Y Also, the value for a is saved in register F0 addi x4,x1, 800 x1 upper bound for X foo fld F2,0(x1) (F2) X(i) fmul d F4,F2,F0 (F4) a X(i) fld F6,0(x2) (F6) Y(i) fadd d F6,F4,F6 (F6) a X(i) Y(i) fsd F6,0(x2) Y(i) (F6) addi x1,x1, 8 increment X index addi x2,x2, 8 increment Y index sltu x3,x1,x4 test continue loop bnez x3,foo loop if needed Assume the functional unit latencies as shown in the following table Assume a one cycle delayed branch that resolves in the ID stage Assume that results are fully bypassed Instruction Producing Result Instruction Using Result Latency in Clock Cycles FP Multiply FP ALU OP 6 FP Add FP ALU OP 4 FP Multiply FP Store 5 FP Add FP Store 4 Integer operations and all loads Any 2 (A) Assume a single issue pipeline Show how the loop would look both unscheduled by the compiler and after compiler scheduling for both floating point operation and branch delays, including any stalls or idle clock cycles What is the execution time (in cycles) per element of the result vector (i e , every iteration) How much faster must the clock be for processor hardware alone to match the performance improvement achieved by the scheduling compiler (Neglect any possible effects of increased clock speed on memory system performance (b) Assume a single issue pipeline Unroll the loop as many times as needed to schedule it without any stalls, collapsing the loop overhead instructions How many times does the loop need to be unrolled Show the instruction schedule What is the execution time per element of the result (here, this means how many cycles does it take to process a single array element, not an entire iteration, which will be larger)

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In this exercise, we look at how software techniques can extract instruction-level parallelism (ILP) in a common vector loop. The following loop is the so-called

In this exercise, we look at how software techniques can extract instruction-level parallelism (ILP) in a common vector loop. The following loop is the so-called DAXPY loop (double-precision aX plus Y) and is the central operation in Gaussian elimination. The following code implements the DAXPY operation, Y = aX + Y, for a vector of length 100. Initially, R1, is set to the base address of array X and R2 is set to the base address of array Y. Also, the value for a is saved in register F0.

addi x4,x1,#800 : x1 = upper bound for X foo: fld F2,0(x1) : (F2) = X(i) fmul.d F4,F2,F0 : (F4) = a * X(i) fld F6,0(x2) : (F6) = Y(i) fadd.d F6,F4,F6 : (F6) = a*X(i) + Y(i) fsd F6,0(x2) : Y(i) = (F6) addi x1,x1,#8 : increment X index addi x2,x2,#8 : increment Y index sltu x3,x1,x4 : test: continue loop? bnez x3,foo : loop if needed

Assume the functional unit latencies as shown in the following table. Assume a one-cycle delayed branch that resolves in the ID stage. Assume that results are fully bypassed.

Instruction Producing Result	Instruction Using Result	Latency in Clock Cycles
FP Multiply	FP ALU OP	6
FP Add	FP ALU OP	4
FP Multiply	FP Store	5
FP Add	FP Store	4
Integer operations and all loads	Any	2

(A) Assume a single-issue pipeline. Show how the loop would look both unscheduled by the compiler and after compiler scheduling for both floating-point operation and branch delays, including any stalls or idle clock cycles. What is the execution time (in cycles) per element of the result vector (i.e., every iteration). How much faster must the clock be for processor hardware alone to match the performance improvement achieved by the scheduling compiler. (Neglect any possible effects of increased clock speed on memory system performance.

(b) Assume a single-issue pipeline. Unroll the loop as many times as needed to schedule it without any stalls, collapsing the loop overhead instructions. How many times does the loop need to be unrolled? Show the instruction schedule.What is the execution time per element of the result (here, this means how many cycles does it take to process a single array element, not an entire iteration, which will be larger).