Lab 5 Design simulation of a BiCMOS Operational Amplifier

In the language of your choice (i.e. C++, Java, Matlab, Python, etc.), code the equations for the BiCMOS 2-stage Miller compensated operational amplifier. Follow the hand calculations in BipolarsPt2.pdf beginning on page dra-3 using the same parameters for the NPN bipolar and CMOS processes. Use the same total allowed current of 100uA and 3.3V power supply. Sweep the current distribution from 1% first stage (99% second stage) to 99% first stage (1% second stage), and plot the following values: 1. Low frequency gain 2. Unity gain bandwidth Given this range of currents and the constraint that no CMOS device can be smaller than 2um in width, what is the maximum unity gain bandwidth you can achieve? And what is the current division, device widths, Rz, and Cc that achieves this? Also, the maximum allowed Cc is 10pF. Submit your code and plots and optimum point for maximum unity gain bandwidth. (Note that we are neglecting parasitic capacitances and a pole in the first stage that would complicate this analysis, but well save that for graduate courses)

***Please any help for me to get going will be appreciated***