Last phase of the project includes whole datapath with Control Unit Datapath signals ondatapath must be generated in Control Unit using a Finite State Machine Since there will bedifferent designs, you are responsible for preparing test inputs for your own processor You areexpected to write an assembly code with all instructions defined above Then, your assembler willconvert assembly code to machine code which will be input for your logisim design You can load thismachine code to the Instruction Memory by right clicking on Memory component on Logisimsoftware I could not do this part It needs to be done in Logisim Can you help me I can share the circ file if you need it pc Clock readPC Signal This part is not finished yet Signals will be associated with control unit At 3 iteration of Project 1 memReadSignal 4 mewriteSignal Lam clock 1 regWinteSignal cmp Signal Tag Clock Instruction Memory CONTROL UNIT PC 64KB ROM (NOT COMPLETE) REGISTER FILE comparator ALU SELECTOR mux FLAG FLAG Data Memory 1KB RAM ALU pc Clock readPC Signal This part is not finished yet Signals will be associated with control unit At 3 iteration of Project 1 memReadSignal 4 mewriteSignal Lam clock 1 regWinteSignal cmp Signal Tag Clock Instruction Memory CONTROL UNIT PC 64KB ROM (NOT COMPLETE) REGISTER FILE comparator ALU SELECTOR mux FLAG FLAG Data Memory 1KB RAM ALU

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Question: Last phase of the project includes whole datapath with Control Unit. Datapath signals ondatapath must be generated in Control Unit using a Finite State Machine.

Last phase of the project includes whole datapath with Control Unit. Datapath signals ondatapath must be generated in Control Unit using a Finite State Machine. Since there will bedifferent designs, you are responsible for preparing test inputs for your own processor. You areexpected to write an assembly code with all instructions defined above. Then, your assembler willconvert assembly code to machine code which will be input for your logisim design. You can load thismachine code to the Instruction Memory by right clicking on Memory component on Logisimsoftware.

I could not do this part. It needs to be done in Logisim. Can you help me? I can share the .circ file if you need it.

Last phase of the project includes whole datapath with Control Unit. Datapath

pc_Clock readPC_Signal This part is not finished yet. Signals will be associated with control unit At 3 iteration of Project 1 memReadSignal 4 mewriteSignal Lam clock 1 regWinteSignal cmp Signal Tag Clock Instruction Memory CONTROL UNIT PC 64KB ROM (NOT COMPLETE) REGISTER FILE comparator ALU SELECTOR mux FLAG FLAG Data Memory 1KB RAM ALU pc_Clock readPC_Signal This part is not finished yet. Signals will be associated with control unit At 3 iteration of Project 1 memReadSignal 4 mewriteSignal Lam clock 1 regWinteSignal cmp Signal Tag Clock Instruction Memory CONTROL UNIT PC 64KB ROM (NOT COMPLETE) REGISTER FILE comparator ALU SELECTOR mux FLAG FLAG Data Memory 1KB RAM ALU

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