mips

Which of the following instructions needs the "shift left 2" component in the single cycle datapath covered in class? Select one: Iw beq SW slt sub Which of the following is not a component of the single cycle datapath covered in class? Select one: sign extend instruction register (IR) adder for incrementing PC by 4 instruction memory data memory Which of the following is a sequential circuit? Select one: 1-bit full adder NOR gate Dlatch