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Multiply highlighted value by 2. Given: You have been hired to design the logic for the or R-type instruction in AMD's new 4-bit CPU. It

Multiply highlighted value by 2. image text in transcribed

Given: You have been hired to design the logic for the or R-type instruction in AMD's new 4-bit CPU. It is required to show ALL incremental steps of the solution within each partial credit subpart. Partial How many 2-input Boolean gates will you require inside the ALU to realize this instruction? Credit 1: Partial If the energy consumption of a Boolean gate is 5 picojoules each time its output changes, Credit 2: then what is the worst-case energy consumption to execute a single or instruction? Assume other energy consumption besides ALU datapath gates is negligible. Partial The compiler design team has dictated that the CPI for or is 1.5. Credit 3: What minimum clockrate must the hardware design team utilize so that this processor can achieve 3350MIPS on a benchmark consisting solely of or instructions? Assume any operations besides the Boolean gates in the ALU require negligible time (zero time for fetching instructions and operands from memory, zero time to access registers, zero time for control signals, etc.). Indicate your answer to nearest 100MHz below. Given: You have been hired to design the logic for the or R-type instruction in AMD's new 4-bit CPU. It is required to show ALL incremental steps of the solution within each partial credit subpart. Partial How many 2-input Boolean gates will you require inside the ALU to realize this instruction? Credit 1: Partial If the energy consumption of a Boolean gate is 5 picojoules each time its output changes, Credit 2: then what is the worst-case energy consumption to execute a single or instruction? Assume other energy consumption besides ALU datapath gates is negligible. Partial The compiler design team has dictated that the CPI for or is 1.5. Credit 3: What minimum clockrate must the hardware design team utilize so that this processor can achieve 3350MIPS on a benchmark consisting solely of or instructions? Assume any operations besides the Boolean gates in the ALU require negligible time (zero time for fetching instructions and operands from memory, zero time to access registers, zero time for control signals, etc.). Indicate your answer to nearest 100MHz below

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