Draw schematics for the following using the complete gate sets specified in braces. You may assume literals and their complements are available. You are ALLOWED to use multi-level logic. 1. f(w, x, y, z) = m(1,3,5,7,9) + Ed(6, 12, 13). Use AND, OR and NOT gate only. (m represents minterms and d represents don't-care terms). [Points: 10] 2. f(w, x, y, z)= x(x + y)z+w. Use NOR and NAND gate only. [Points: 10] 3. Implement f = a b with AND/OR/NOT gates. Now convert this into NOR/NOR by using the Bubble Pushing technique we learned in the class. Assume inverted inputs, i.e., and are not available. [Points: 10]