On an ARM processor, assuming that [N-bit] = 0, [Z-bit] = 0, [C-bit] = 1, [V-bit] = 1, predict whether each of the following branch instruction is going to make the flow of control branch to the instruction labeled by NEXT. (These instructions are NOT executed one after the other one; instead, each instruction starts with the initial conditions given in the statement.)

(a) BLS NEXT

(b) BNE NEXT

(c) BLE NEXT

(d) BVC NEXT