Part 5: Memory Design Name: Consider a memory designed a follows: December 20 The main memory has 8GB. You have a cache of 128KB. a byte consists of 8 bits a word consists of 4 bytes (a byte is the smallest addressable unin) a memory block will consist of 64 words 1. How many words are in the main memory? 2. How many bits will be used to identify each word in the cache? [2] 3. What is the total number of bits in the cache? [3] 4. How many bits are there in the main memory address? [4] 5. What size decoder will be needed within each memory block? [5] 6. How many blocks are needed for the cache? [6] 7. What size decoder will be needed outside the block structure? [7] 8. How many decoders are needed for the entire cache? [8] If you are accessing byte-memory location 134B2 (hexa-decimal number) 9. Which block in the cache will you access? (hexadecimal) [9] 10. Which word within the block will you access? (hexadecimal) [10]