please answer number 19

17. Consider the following hypothetical instruction: SubMem R1, mem1, mem2 This instruction works as follows: R1[mem1]-[mem2] In a multi-cycle datapath implementation, this instruction will: a. Use the MDR twice b. Use the ALU once c. Use the "shift to left" unit twice d. None of the above Answer: B 18. Consider the following hypothetical instruction: Mems mem1, R1, mem2 This instruction works as follows: [mem1]R1-[mem2] One of the following is correct about this instruction: a. It will not need the B register b. It will require priting into MDR twice c. It will require writing into the ALUout three times d. None of the above Answer: A 19. By comparing the hypothetical instructions given in Questions (17) and (18), if we run these instructions on the same processor, then one of the following is correct: a. Both instructions have the same CPI b. Mems executes faster than SubMem c. SubMem executes faster than Mems d. Mems does not need the MDR