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Ques.1: Your job is to design a finite state machine that is similar to the counter that you designed earlier. In this case you will design a counter that must count by adding 5 to current value using modulo 8 arithmetic- i.e., next state is current value plus 5 mod 8. The sequence it should go through is 0, (0+5) mod 8-5, (5+5) mod 8-2, ((5+5)mod 8 +5)mod 8= (2+5)mod 8-7, etc. For example, part of the sequence is 0, 5, 2, 7, (review your modulo arithmetic!). In addition, the counter will output X = 1 when its current value is a non-zero even number else its output is X-0. (a) First draw the state diagram. How many flip flops are needed to store the states? (b) Next, produce a truth table showing what the next state of the machine should be as a function of the current state as well as the output X. You must indicate in your table the Most Significant Bit (MSB) and the Least Significant Bit (LSB) of your state variables. From the truth table, produce a combinational circuit that connects to D-flip flops that hold the state of the machine. Please make sure to indicate on your table and in your circuit which state bit is the Most Significant Bit (MSB) and which is the Least Significant Bit (LSB)