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Problem #3 How would the following loop be scheduled on a static 2-issue pipeline for MIPS (where one of the instructions can be integer ALU

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Problem #3 How would the following loop be scheduled on a static 2-issue pipeline for MIPS (where one of the instructions can be integer ALU or branch and the other can be load or store)? Reorder the instructions to avoid as many pipeline stalls as possible and unroll the loop two times. Assume branches are predicted, so that control hazards are handled by the hardware. Compute the IPC for the code too. This code add a scalar constant to each element of the array pointed by $s1 Loop lw St0, 0(Ssl) Load element from array Add a scalar in Ss2 Store result ; Decrement pointer ; Continue until Ssl !=0 addu $t0, St0, Ss2 addi Ss1, Ss1, #4 bne Ssl, Szero, Loop Problem #3 How would the following loop be scheduled on a static 2-issue pipeline for MIPS (where one of the instructions can be integer ALU or branch and the other can be load or store)? Reorder the instructions to avoid as many pipeline stalls as possible and unroll the loop two times. Assume branches are predicted, so that control hazards are handled by the hardware. Compute the IPC for the code too. This code add a scalar constant to each element of the array pointed by $s1 Loop lw St0, 0(Ssl) Load element from array Add a scalar in Ss2 Store result ; Decrement pointer ; Continue until Ssl !=0 addu $t0, St0, Ss2 addi Ss1, Ss1, #4 bne Ssl, Szero, Loop

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