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Problem 4 . Multi - level page tables rve perfected my machine's page table implementation. I need you independenthy verify my implementation. Note: rve expressed
Problem Multilevel page tables
rve perfected my machine's page table implementation. I need you independenthy verify my
implementation. Note: rve expressed all of the numbers in binary. Ive decided to use bits
for rry page offset and bits for virtual page number. The mast significant bits are used to
index the page directory and the next bits are used to index the corresponding page table.
Virtual Address:
Your mission: Given a virtual address and a type of access Read Write, eXecute determine
the physical address accessed. If the translation fails or the permissions do not allow that
type of access, the correct answer is FAULT. If the translation succeeds and the access type is
permitted, the correct answer is the entire physical address to be accessed by the MMU pag
frame number and offset
Multilevel page tables, continued.
Given rry choices for virtual page number length, how big is rry virtual address space in
pages? In bytes?
How big is my physical address space in pages? In bytes?
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