Q$1$: A carry look ahead generator circuit helps

speed the process of adding binary numbers

by calculating the carry bits before the

addition process begins. Assuming a $6-$bit

adder, and by using Verilog design and

testing:

Show how fast is the carry look

ahead compared to the serial adder.

Assume that the propagation delay

of any logic gate used $($ AND, NAND,

OR$,$ NOR, NOT, XOR, XNOR$)$ is $10ns.$

Test the circuit by performing $3$ tests

on adding different numbers of your

choice.